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Principal CAD Engineer

Marvell Semiconductor, Inc.
paid time off, flex time, 401(k)
United States, California, Santa Clara
5488 Marvell Lane (Show on map)
Jan 18, 2025

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

As a key CAD member of Marvell Central Engineering team, you will play leading role on developing the multi-die and hierarchical design flow and add-on tools. You will have the opportunity to use your extensive design and CAD knowledge to solve challenging design problems.

What You Can Expect

  • Working with advanced 2.5D and 3D multi-die technology development.

  • Full-chip and Hierarchical design flow and Methodology.

  • Define Signoff requirement and develop required flows.

  • Design flows, including APR, EM/IR, STA, Thermal, and SI/PI, enablement.

  • Design kit generation and QA.

  • Deploy multi-die and hierarchical solutions to design team.

  • Come up with innovative solutions to ever-increasing design challenges.

  • Keep abreast with process and tool evaluation advancements.

  • Interface with EDA vendors.

What We're Looking For

  • Bachelor's in electrical engineering or equivalent and 10+ years of hands-on experience in physical design and flow development or MS and 8 years' experience, or PHD and 6 years' experience

  • Proven experience with 16nm or below (Preferably 5nm & 3nm).

  • Experience with Full-chip and Hierarchical methodology and flow development.

  • Experience with Multi-die Methodology and flow development.

  • Experience with 3DIC compiler or Cadence Integrity tools.

  • Understanding of packaging aspects for multi-die systems.

  • Experience with programing languages, such as C++, Python, Perl, Tcl.

  • Self-motivated with ability to solve complex problems.

  • Excellent verbal and written communication skills in English.

Expected Base Pay Range (USD)

130,650 - 195,700, $ per annum

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

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